The Computational Engineering group focuses on the design of energy- and resource-efficient computing systems. Our research spans several levels of abstraction, from instruction set architecture and microarchitecture to methods and tools for the design and verification of digital hardware. The processors and accelerators we develop are prototyped on FPGAs and evaluated experimentally.
Processor architecture and RISC-V
Processor architecture is a central focus of our work. We investigate extensions to the open RISC-V instruction set architecture as well as novel processor concepts beyond established architectures. This work follows the principles of open hardware and open standards.
Hardware architectures for neural networks
We develop hardware architectures for neural networks, with particular emphasis on spiking neural networks (SNNs). Compared with conventional artificial neural networks, SNNs model the behavior of biological neurons more faithfully. They are considered a promising path toward highly energy-efficient hardware implementations.
Approximate computing
Many applications, including neural networks, tolerate small computational errors. Approximate computing exploits this tolerance to substantially reduce energy consumption and resource usage. Our research addresses methods for systematically identifying and implementing suitable approximations.
Hardware description languages and design methodology
In addition to the established hardware description languages VHDL and Verilog, we employ modern hardware construction languages such as Chisel and Clash. They bring software engineering concepts to hardware design, notably parameterization, hardware generators and functional programming. This improves productivity in developing complex systems and keeps our approach technology-independent.
Logic synthesis and formal verification
We study logic synthesis, the transformation of abstract hardware descriptions into efficient circuit implementations. We apply SAT and SMT solvers to formally verify hardware correctness.
Prototyping and evaluation
Our designs are implemented on FPGA platforms and evaluated experimentally with respect to power consumption and resource usage.
Opportunities and collaboration
Students: The group offers bachelor's and master's theses on its research topics. These often involve designing custom hardware and testing it on FPGAs. → Theses
Doctoral candidates: If you have a background in computer architecture and FPGAs and are considering a PhD, we welcome your inquiry. → Contact
Industry: We welcome collaboration with industry partners on efficient hardware. → Contact